Naim DAC - tech. q.
Posted by: bhaagensen on 21 January 2010
Hi,
this is perhaps to the hairy side and may not even be particularly relevant (or allowed)? Nonetheless, its keeping me up at nights, so I'll try my luck
Having read the whitepaper I am very impressed by the nice solution to the jitter-issue. Its IMO the (only) right solution. But now that it seems so close to perfect, I can't help but think about two things that I would think could completely avoid the use of ASRC.
- Use larger buffer. Memory is cheap these days. Why not let the DAC buffer, say 100MB. That should give a lot of room for one of the 10 clocks to match sufficiently close.
- I can see that the above does not e.g. scale well. But then one could instead/also monitor the buffer level. If it falls below some threshold, resync on a sample and choose a slightly slower clock. If it's saturating, resync on a sample and choose a slightly faster clock.
Anyway, there it is. As I said its most of a technical curiosity on my side - answers highly appreciated though.
Bjørn
this is perhaps to the hairy side and may not even be particularly relevant (or allowed)? Nonetheless, its keeping me up at nights, so I'll try my luck
Having read the whitepaper I am very impressed by the nice solution to the jitter-issue. Its IMO the (only) right solution. But now that it seems so close to perfect, I can't help but think about two things that I would think could completely avoid the use of ASRC.
- Use larger buffer. Memory is cheap these days. Why not let the DAC buffer, say 100MB. That should give a lot of room for one of the 10 clocks to match sufficiently close.
- I can see that the above does not e.g. scale well. But then one could instead/also monitor the buffer level. If it falls below some threshold, resync on a sample and choose a slightly slower clock. If it's saturating, resync on a sample and choose a slightly faster clock.
Anyway, there it is. As I said its most of a technical curiosity on my side - answers highly appreciated though.
Bjørn